Arria® II FPGAs are uniquely suited to meet the challenging requirements of wireline applications, especially high-volume applications such as networking and access equipment.
Arria II FPGAs combine 6.375-Gbps transceivers, 400-MHz external memory interfaces, and a 40-nm logic fabric, delivering a cost-optimized, lowest power platform on which to build your communications system solutions.
The easy-to-use Quartus® II design software and SOPC Builder intellectual property (IP) integration tool allow you to quickly develop solutions with Arria II FPGAs for:
- IP-DSLAM line cards
- GPON and EPON line cards
- GPON MDUs
- Ethernet and SONET aggregation
- RXAUI
- Interlaken
Table 1 shows some of the most significant Arria II wireline application advantages.
| Table 1. Key Wireline Application Advantages of Arria II FPGAs | |
| Feature | Advantages |
|---|---|
| Integrated 6.375-Gbps Transceivers |
|
| 400-MHz DDR2 and DDR3 Memory Interfaces |
|
| 40-nm ALM Logic Fabric and Quartus II Design Software |
|
As shown in Figure 1, you can use Arria II FPGAs for many of the functions in a typical multi-service access node (MSAN), including L2-L3 packet processing on DSL line cards, packet processing, and traffic management on GPON or EPON line cards, as well as control processing, packet coprocessing, and MAC functions at various points in the system. Since the integrated transceivers support backplane signaling up to 6.375 Gbps, you'll have the connectivity you need with fewer components, lower power, and lower system cost.
Figure 1. Multi-Service Access Node Architecture Example
To help you get to market faster and reduce costs, Altera offers the design resources shown in Table 2.
| Table 2. Wireline Design Resources | ||
| Category | Resource | Description |
|---|---|---|
| Development Kit Resources | ||
|
Arria II Development Kits | The Arria II GX development kits (3G and 6G editions) provide you with versatile development platforms and allow you to evaluate the Arria II GX silicon. An integrated PCIe® x8 connector and collection of daughtercards allow you to use the Arria II GX development kits in conjunction with backplanes. |
| Software and Intellectual Property Resources | ||
|
Reference Designs | Altera offers a range of reference designs to help kick-start your design. In addition to the reference designs (including designs for 10Gb Ethernet XAUI and multiple PCI Express® designs), additional tools and services to address packet processing applications are available. Contact your Altera® sales representative for more information. |
| MegaCore® IP, Partner IP and the SOPC Builder IP Integration Tool | Library of intellectual property (IP) cores from Altera and partners for a wide range of useful functions including Triple Speed Ethernet MAC, POS-PHY L4, SONET/SDH Mappers and Framers, and many more. The SOPC Builder tool makes integrating multiple IP blocks to create systems solutions easy. | |
| Nios® II Embedded Processor |
The world's most versatile embedded processors supported by easy-to-use development tools and a portfolio of FPGA development kits. | |
