Stratix V Webcasts and Videos | |
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Reduce System Cost by Removing External Compensation Components with Stratix V FPGAs We know improving your systems performance and design productivity are of critical importance to you. We also know that seeing is believing, which is why you will want to watch this short demonstration of how our 28-nm Stratix V FPGA can provide you with the lowest jitter and bit error rate. In addition, you will see how system cost and power are reduced by removing external compensation components. Salman Jiva, Technical Manager, High-End FPGAs |
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Optimizing 10-Gbps Backplane Performance on Stratix V FPGAs Watch this video to see how you can use the Transceiver Signal Integrity Development Kit, Stratix® V GX Edition and Transceiver Toolkit in Quartus II software to evaluate Stratix V FPGA transceiver performance. You'll see a 10GBASE-KR backplane demo, Transceiver Toolkit in action, and the eye opening after the receiver equalization. Salman Jiva, Technical Manager, High-End FPGAs |
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Implementing Floating-Point DSP in an FPGA Watch this webcast to see how our floating-point design flow helps you efficiently implement your digital signal processing (DSP) applications. You’ll learn how our FPGAs solve floating-point challenges, see our model-based tool flow, and find out about a third-party white paper from BDTI that analyzes our floating-point DSP flow. Jordon Inkeles, Sr. Manager, Software and DSP Marketing |
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Sneak Peek: Industry’s First 28-Gbps FPGA Watch this 5-minute video to see the performance of our 28-nm Stratix® V FPGA transceiver. You will see the transmit eye diagram at 28 Gbps running a PRBS-31 pattern and the receiver performance at 28 Gbps. You will also learn about the transceiver architecture that provides high performance, power efficiency, and reliability. Salman Jiva, Technical Manager, High-End FPGAs |
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Enabling High-Performance DSP with Arria V or Cyclone V Variable-Precision DSP Block In this webcast, you will learn how the variable-precision digital signal processing (DSP) blocks in our 28-nm Arria® V and Cyclone® V FPGAs enable complex DSP. With five key enhancements in the DSP base blocks, you get higher performance and resource savings. Patrick Fasang, Senior Member of Technical Staff |
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Sneak Peek: Industry's First 28-nm High-End FPGA Running at 14.1 Gbps Watch this video to see the progress of the Stratix V FPGA characterization process, as well as 14.1-Gbps transceiver performance. Stratix V FPGAs are the industry's first 28-nm high-end FPGAs. Salman Jiva, Applications Manager |
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Scale Beyond 1080p with 4K Design Methodology In this webcast, you will learn how our FPGAs and video framework simplify your 4K-resolution video system design and support multi-channel format conversion. Our FPGAs and video framework will also reduce your system cost and complexity. You will see how the ready-to-use reference designs that perform up and down conversions help you kick start your system development. Girish Malipeddi, Technical Marketing Manager |
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Enhance Your Productivity with Faster Design Compile Times When choosing your FPGA design software, be sure to consider compile time, a key productivity advantage. In this webcast, you'll learn how Altera's Quartus® II design software delivers a 2X to 3X compile time advantage over competitive software. Richard Yang, Product Marketing Engineer |
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Lower Power and Boost System Bandwidth on 28-nm FPGAs Learn about key innovations in Stratix® V FPGAs that address bandwidth and power challenges in high-end systems designs. Embedded HardCopy Blocks, power-efficient 28-Gbps transceivers, and software power optimization are just a few of the features that will help you balance bandwidth, power, and cost requirements. Frank Yazbeck, Senior Technical Marketing Staff |
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Achieving 1-TFLOPS Performance with 28-nm FPGAs Watch this webcast to learn how Altera’s 28-nm Stratix® V FPGA, with its unique variable-precision digital signal processing (DSP) architecture,can deliver 1 TFLOPS performance. This architecture combines the implementation efficiency of fast Fourier transforms (FFTs) and finite impulse response (FIR) with the best support for higher precision and floating-point signal processing. Michael Parker, DSP Technical Marketing Manager |
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