Altera provides a range of complete FPGA solutions for the development of custom Serial RapidIO® (SRIO)processing elements, bridges, and switches. Device and intellectual property (IP) support is available for x1 and x4. The solutions, which include configurable SRIO IP cores and development boards, allow you to concentrate on the core functions of the system design by providing:
- Simple and fast protocol implementation
- Reduced design risks
- Shortened development times
Literature
- RapidIO MegaCore® Function User Guide (PDF)
- MegaCore IP Library Release Notes and Errata (PDF)
- Archive of intellectual property release notes
- Archive of intellectual property errata sheets
Application Notes
- AN 513: RapidIO Interoperability with TI 6482 DSP Reference Design (PDF)
- AN 568: RapidIO Interoperability with TI 6488 DSP Reference Design (PDF)
- AN 617: RapidIO Dynamic Data Rate Reconfiguration Reference Design for Stratix IV GX Devices (PDF)
Reference Designs
- SRIO to TI 6482 DSP reference design
- SRIO to TI 6488 DSP reference design
- RapidIO dynamic data rate reconfiguration reference design for Stratix IV GX devices
- Design example: Maintenance Master to System Maintenance Slave bridge
- Design example: customized implementation using Avalon®-ST pass through interface
Altera Knowledge Database
The Knowledge Database provides support solutions, answers to frequently asked questions, and information about known issues regarding SRIO.
See frequently viewed solutions:
- Does the SRIO MegaCore provide any platform to implement some custom logical layer functions or my own custom NREAD/NWRITE module?
- Why does the order of the SRIO link packets differ from the order in the application layer?
- Is the RapidIO capable of recovering from a cable pull and re-establishing a SRIO link?
- Can I connect the system maintenance slave interface in my SRIO design to ground if I am not using it to reduce the overall logic element (LE) consumption?
- How does the waitrequest signal of the Avalon-MM I/O slave port respond to a continuous write burst?
Find additional solutions on the RapidIO MegaCore function.
Online Training Courses
Development Kits
The following development kits are available for the RapidIO MegaCore function:
