Altera’s DSP Builder technology allows you to go from system definition and simulation using the industry-standard The MathWorks Simulink tools to system implementation in a matter of minutes.
The DSP Builder Signal Compiler block reads Simulink Model Files (.mdl) that are built using DSP Builder and MegaCore® blocks, and generates VHDL files and tool command language (Tcl) scripts for synthesis, hardware implementation, and simulation.
Altera recommends that you use DSP Builder Advanced Blockset for all new designs. This allows design optimization to the required system fmax, latency control, vector and multi-channel designs, advanced math functions, and fixed point as well as single- and double-precision floating-point datapath support.
DSP Builder Standard Blockset is and will be still supported. However, you are recommended to use Standard Blockset primarily as a wrapper to DSPBuilder Advanced Blockset to access features, such as the SignalTapTM logic analyzer and hardware-in-the-loop simulation, and to import your own HDL into the DSP Builder environment.
The DSP design implementation flow using DSP Builder is shown in Figure 1.
Figure 1. DSP Builder Design Flow
Altera and The Mathworks work in close collaboration to ensure that you get the price and performance benefits of Altera® FPGAs while leveraging Simulink, the industry-leading tool for model-based designs from The MathWorks.
Altera’s Simulink-to-FPGA synthesis technology is unique in the industry as it now supports timing-driven synthesis of a Simulink design representation.
This technology allows you, for the first time, to automatically generate timing-optimized register transfer level (RTL) code based on high-level Simulink design descriptions. With this new DSP Builder feature, you can achieve high-performance design implementations running at near-peak FPGA performance in a matter of minutes. This significantly improves productivity compared to the hours, if not days, required to hand-optimize the HDL code. For more information, view DSP Builder Advanced Blockset libraries.
A full overview of DSP intellectual property (IP) that works in conjunction with DSP Builder and the IP evaluation flow is available on the Altera IP MegaStoreTM website.
What People are Saying About Altera DSP Builder
“DSP Builder’s second-generation model-based synthesis technology allows customers to use Simulink as the modeling, simulation, and implementation environment of choice for high-performance DSP designs. This technology allows designers to vastly improve their productivity as they implement DSP functionality on Altera’s FPGAs.”
Ken Karnofsky
Marketing Director, Signal Processing and Communications
The MathWorks
